Transitive Dependency Chains

Multi-hop dependency paths showing how high-level application requests cascade through multiple layers to hardware and power systems.

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What Are Transitive Dependencies?

Direct Dependency: A depends on B Transitive Dependency: A depends on B, B depends on C, therefore A depends on C

Why This Matters: Changing C can break A, even though A doesn’t directly reference C. Without transitive dependency tracking, these failures are invisible until runtime.

Chain 1: Application → I2C Communication → Power

What You’re Looking At

This diagram shows a complete 13-hop dependency chain from your high-level application code all the way down to the physical GPIO pin that controls power. Each layer adds indirection, making it harder to see how a change at the bottom (like flipping a power switch setting) affects the top (your application getting sensor data).

Think of it like: Ordering food through multiple middlemen—you ask a waiter (Application), who tells the kitchen manager (Device Manager), who tells the line cook (Bus Driver), who uses equipment (I2C Bus), which requires electricity (Power). If someone unplugs the stove, your food never arrives, but the waiter has no idea why.

Complete Dependency Path

%%{init: {'flowchart': {'defaultRenderer': 'elk'}}}%%
flowchart TB
    subgraph "Layer 1: Application"
        APP[Application Component<br/>Requests IMU data]
    end

    subgraph "Layer 2: Device Manager"
        DM[ImuManager.read]
        PORT[busWriteRead_out port]
    end

    subgraph "Layer 3: Bus Driver"
        BD[LinuxI2cDriver.writeRead]
        DEV["/dev/i2c-1" device]
    end

    subgraph "Layer 4: Hardware Bus"
        I2C[I2C Physical Bus<br/>SDA/SCL pins]
        PULLUP[Pull-up Resistors<br/>4.7kΩ]
    end

    subgraph "Layer 5: Device"
        IMU[MPU6050 IMU<br/>Address: 0x68]
        REG[Device Registers<br/>DATA_REG: 0x10]
    end

    subgraph "Layer 6: Power (PROVES Kit)"
        PWR[3.3V Power Supply]
        LSM[LoadSwitchManager<br/>turn_on]
        PIN[board.IMU_ENABLE<br/>GPIO Pin]
    end

    subgraph "Layer 7: Board Configuration"
        BOARD[Board Definition<br/>Pin Mapping]
        LOGIC[enable_logic<br/>Active High/Low]
    end

    APP -->|1. requests| DM
    DM -->|2. calls| PORT
    PORT -->|3. invokes| BD
    BD -->|4. opens| DEV
    DEV -->|5. uses| I2C
    I2C -->|6. requires| PULLUP
    I2C -->|7. communicates with| IMU
    IMU -->|8. reads from| REG
    IMU -->|9. REQUIRES| PWR
    PWR -->|10. controlled by| LSM
    LSM -->|11. enables via| PIN
    PIN -->|12. defined in| BOARD
    LSM -->|13. configured with| LOGIC

    style APP fill:#e1f5ff
    style DM fill:#fff4e1
    style BD fill:#f0e1ff
    style IMU fill:#ffebee
    style PWR fill:#ffcdd2
    style LSM fill:#fff9c4

    linkStyle 8 stroke:#f44336,stroke-width:4px
    linkStyle 9 stroke:#ff9800,stroke-width:3px

Documented vs. Undocumented Links

Hop	From	To	Documented?	Source
1	Application	Device Manager	✅ Yes	F´ docs line 30
2	Device Manager	busWriteRead port	✅ Yes	F´ docs line 76
3	Port	Bus Driver	✅ Yes	F´ docs line 236
4	Bus Driver	/dev/i2c-1	✅ Yes	F´ docs line 248
5	Device	I2C Bus	✅ Yes	F´ docs line 41
6	I2C	Pull-up Resistors	⚠️ Implicit	Not in docs (standard I2C)
7	I2C	IMU Device	✅ Yes	F´ docs line 28
8	IMU	Registers	✅ Yes	F´ docs line 97
9	IMU	Power Supply	❌ NO	GAP: Not documented
10	Power	LoadSwitchManager	❌ NO	GAP: Not documented
11	LSM	GPIO Pin	✅ Yes	PROVES docs line 28
12	Pin	Board Definition	✅ Yes	PROVES docs line 27
13	LSM	enable_logic	✅ Yes	PROVES docs line 34

Critical Gap: Steps 9-10 create a hidden transitive dependency from Application Layer to Power Management Layer across two separate systems.

Impact Analysis

If you change:

enable_logic from True to False (Layer 7)

Transitive effect:

GPIO pin inverts (Layer 6)
Power supply disabled (Layer 5)
IMU device loses power (Layer 5)
I2C communication fails (Layer 4)
Bus driver returns I2C_READ_ERR (Layer 3)
Device manager logs warning (Layer 2)
Application receives no IMU data (Layer 1)

Time to detect: Unknown - Could be immediate or delayed hours/days

Root cause visibility: Low - F´ error message doesn’t mention power

Why This Matters: Without understanding transitive dependencies, you might spend hours debugging “I2C communication failure” when the real problem is a power configuration 6 layers away. This is why the Team A/Team B failure happened—Team B optimized what looked like an arbitrary delay without understanding the full dependency chain.

Chain 2: Configuration → Topology → Bus → Power

What You’re Looking At

This sequence diagram shows what happens when your system boots up. The tricky part is that steps 2-5 (highlighted in red and yellow) are completely undocumented. Most developers only see the green F´ documentation telling them to call busDriver.open(), but they don’t know they need to power on the device first and wait for it to stabilize.

Think of it like: Starting a car. You need to (1) unlock the door, (2) sit down, (3) put the key in, (4) turn it, and (5) wait for the engine to warm up before driving. If the manual only says “turn the key,” you might try to drive immediately and damage the cold engine.

Initialization Dependency Chain

sequenceDiagram
    autonumber
    participant Main as main()<br/>Startup
    participant Topo as Topology.cpp<br/>configureTopology()
    participant LSM as LoadSwitchManager<br/>(PROVES Kit)
    participant Delay as Time<br/>Power Stabilization
    participant BD as LinuxI2cDriver<br/>(F´)
    participant IM as ImuManager<br/>(F´)
    participant HW as MPU6050<br/>Hardware

    Main->>Topo: Call configureTopology()

    rect rgb(255, 200, 200)
        Note over Topo,LSM: ❌ Step 2-4: UNDOCUMENTED
        Topo->>LSM: turn_on("imu")
        LSM->>LSM: Set board.IMU_ENABLE = HIGH
        LSM-->>Topo: Return True
    end

    rect rgb(255, 255, 180)
        Note over Delay: ❌ Step 5: UNDOCUMENTED<br/>How long to wait?
        Delay-->>Delay: Wait for voltage stabilization
    end

    rect rgb(200, 255, 200)
        Topo->>BD: open("/dev/i2c-1")
        BD->>BD: Initialize I2C device
        BD-->>Topo: Return I2cStatus::I2C_OK
    end

    rect rgb(200, 220, 255)
        Topo->>IM: configure(0x68)
        IM->>IM: Set I2C address
        IM-->>Topo: Return I2cStatus::I2C_OK
    end

    rect rgb(200, 255, 255)
        Note over IM,HW: ✅ Step 10-12: Documented in F´
        IM->>HW: Write RESET_REG
        HW->>HW: Device reset
        HW-->>IM: ACK
    end

    Main->>Main: Start RateGroups<br/>(Begin periodic IMU reads)

Documented vs. Undocumented Steps

Step	Action	Documented?	Risk if Missing
1	Call configureTopology()	✅ F´ docs	Low
2	Call LoadSwitchManager.turn_on(“imu”)	❌ NO	HIGH - Skipped entirely
3	Set GPIO pin HIGH	✅ PROVES docs	Low
4	Return success	✅ PROVES docs	Low
5	Wait for power stabilization	❌ NO	CRITICAL - No delay spec
6	Call busDriver.open()	✅ F´ docs	Low
7	Initialize /dev/i2c-1	✅ F´ docs	Low
8	Call imuManager.configure()	✅ F´ docs	Low
9	Set I2C address 0x68	✅ F´ docs	Low
10-12	Device initialization	✅ F´ docs	Low

Critical Gaps:

Step 2: No documentation linking configureTopology() to LoadSwitchManager
Step 5: No specification of required stabilization delay (10ms? 100ms? 1s?)

Failure Modes

%%{init: {'flowchart': {'defaultRenderer': 'elk'}}}%%
flowchart TB
    START[main calls configureTopology]

    CASE1{Does code call<br/>LSM.turn_on?}
    CASE2{Sufficient<br/>delay before<br/>bus.open?}

    FAIL1[❌ Power never enabled<br/>I2C device doesn't exist<br/>open returns I2C_OPEN_ERR]
    FAIL2[❌ Voltage not stable<br/>I2C init races with power-on<br/>Intermittent failures]
    SUCCESS[✅ System initializes correctly]

    START --> CASE1
    CASE1 -->|No| FAIL1
    CASE1 -->|Yes| CASE2
    CASE2 -->|No| FAIL2
    CASE2 -->|Yes| SUCCESS

    style FAIL1 fill:#ffcdd2
    style FAIL2 fill:#ffe0b2
    style SUCCESS fill:#c8e6c9

Probability Estimates:

Path to FAIL1: 60% (Developer doesn’t know to call LSM)
Path to FAIL2: 30% (Developer adds LSM but no delay)
Path to SUCCESS: 10% (Developer has tribal knowledge)

These probabilities demonstrate the knowledge gap problem.

Key Insight: Notice how the “success” path is only 10%? That’s not because developers are bad—it’s because the documentation doesn’t tell them what to do. The 90% failure rate is a documentation problem, not a developer problem.

Chain 3: Error Propagation Path

What You’re Looking At

This flowchart shows what happens when an I2C read fails. The solid lines show what F´ actually does (logs a warning and gives up). The dashed red lines show what SHOULD happen but isn’t implemented—power cycle recovery. This missing recovery logic means every I2C error becomes permanent.

Think of it like: When your Wi-Fi stops working, your computer could either (1) show an error and give up, or (2) automatically try turning the Wi-Fi off and on again. Option 2 fixes 80% of problems automatically. F´ currently does option 1.

When I2C Read Fails

%%{init: {'flowchart': {'defaultRenderer': 'elk'}}}%%
flowchart TB
    START[RateGroup.run every 100ms]

    subgraph "F´ System"
        SCHED[Svc.Sched port]
        RUN[ImuManager.run_handler]
        READ[ImuManager.read]
        STATUS{I2cStatus}
        TLM[tlmWrite_ImuData]
        ERR[log_WARNING_HI_ImuReadError]
    end

    subgraph "What SHOULD Happen (Not Implemented)"
        DETECT[Detect power failure]
        POWER_OFF[LSM.turn_off]
        DELAY1[Wait 500ms]
        POWER_ON[LSM.turn_on]
        DELAY2[Wait 100ms]
        RETRY[Retry read operation]
    end

    subgraph "What ACTUALLY Happens"
        CONT[Continue without IMU data<br/>Silent degradation]
    end

    START --> SCHED
    SCHED --> RUN
    RUN --> READ
    READ --> STATUS
    STATUS -->|I2C_OK| TLM
    STATUS -->|Error| ERR
    ERR --> CONT

    STATUS -.->|should trigger| DETECT
    DETECT -.-> POWER_OFF
    POWER_OFF -.-> DELAY1
    DELAY1 -.-> POWER_ON
    POWER_ON -.-> DELAY2
    DELAY2 -.-> RETRY

    style STATUS fill:#fff9c4
    style ERR fill:#ffebee
    style CONT fill:#ffcdd2
    style DETECT fill:#e1f5ff,stroke-dasharray: 5 5
    style POWER_OFF fill:#e1f5ff,stroke-dasharray: 5 5
    style RETRY fill:#e1f5ff,stroke-dasharray: 5 5

    linkStyle 7,8,9,10,11,12 stroke:#f44336,stroke-width:2px,stroke-dasharray: 5 5

Transitive Error Impact

Layer	Component	Normal State	After I2C Failure	Impact
7	Application	Receives IMU data	Receives stale/zero data	Navigation degraded
6	Telemetry	ImuData channel active	Last good value held	Ground sees freeze
5	Event Log	Normal ops	WARNING_HI event	Operator alerted
4	Device Manager	read() succeeds	read() returns I2C_READ_ERR	Local error
3	Bus Driver	writeRead() works	writeRead() fails	I2C timeout
2	I2C Bus	Active communication	No response from device	Bus idle
1	Power	IMU powered	IMU unpowered	Root cause

Problem: Root cause (Layer 1 - Power) is 6 layers removed from symptom (Layer 7 - Application).

Without Transitive Dependency Tracking: Operator sees “IMU not responding” and doesn’t know to check power.

With Transitive Dependency Tracking: System alerts “IMU failure may be power-related - check LoadSwitchManager state”

Why This Matters: When errors propagate through 7 layers, the symptom you see (Application layer) is completely disconnected from the root cause (Power layer). Without understanding the full chain, you waste time debugging the wrong layer.

Chain 4: Build System Dependencies

What You’re Looking At

This diagram shows how F´’s build system creates your code. When you run fprime-util build, it goes through multiple compilation stages (FPP → C++ → compiled binary). Each stage has its own dependencies. The diagram shows how changing something fundamental (like the target platform) ripples through all the layers.

Think of it like: Making a cake from scratch. You need (1) a recipe (FPP files), (2) ingredients (source code), (3) mixing bowls (CMake), and (4) an oven (compiler). If you switch from a gas oven to electric (change platform), you might need different timing and temperatures at every step.

Compilation Dependency Chain

%%{init: {'flowchart': {'defaultRenderer': 'elk'}}}%%
flowchart LR
    subgraph "User Commands"
        USER[Developer runs:<br/>fprime-util build]
    end

    subgraph "F´ Build System"
        FPP[FPP Compiler]
        CMAKE[CMake]
        GCC[GCC/Clang]
    end

    subgraph "Source Files"
        FPP_SRC[ImuManager.fpp]
        CPP_SRC[ImuManager.cpp]
        TOPO[topology.fpp]
    end

    subgraph "Generated Code"
        AC_HPP[ImuManagerComponentAc.hpp]
        AC_CPP[ImuManagerComponentAc.cpp]
        TOPO_CPP[TopologyAc.cpp]
    end

    subgraph "Dependencies"
        DRV_I2C[Drv.I2c interface]
        SVC_SCHED[Svc.Sched port]
        FW_BUF[Fw.Buffer]
    end

    USER --> FPP
    FPP --> FPP_SRC
    FPP --> TOPO
    FPP_SRC -.->|imports| DRV_I2C
    FPP_SRC -.->|uses| SVC_SCHED
    FPP --> AC_HPP
    FPP --> AC_CPP

    CMAKE --> CPP_SRC
    CPP_SRC -.->|includes| AC_HPP
    CPP_SRC -.->|uses| FW_BUF

    CMAKE --> GCC
    GCC --> TOPO_CPP

    style FPP fill:#e1f5ff
    style CMAKE fill:#fff4e1
    style AC_HPP fill:#c8e6c9
    style AC_CPP fill:#c8e6c9

Transitive Build Dependencies:

ImuManager.fpp imports Drv.I2c
Drv.I2c depends on Fw.Buffer
Fw.Buffer depends on Fw.Types
Fw.Types depends on FpConfig.h
FpConfig.h depends on platform definitions (Linux, Zephyr, etc.)

Impact: Changing platform (Linux → Zephyr) cascades through 5 layers to affect ImuManager compilation.

Key Insight: Build dependencies are usually well-documented (F´’s build system is solid), but they illustrate the same transitive principle: change something at the bottom, affect everything at the top. This is the ONE chain where documentation is good—notice the difference?

Key Insights from Transitive Analysis

1. Hidden Coupling

%%{init: {'theme':'base', 'themeVariables': { 'pie1':'#90ee90', 'pie2':'#ffa500', 'pie3':'#ff6b6b'}}}%%
pie title Dependency Visibility
    "Direct (visible in code)" : 15
    "Transitive (hidden)" : 27
    "Cross-system (undocumented)" : 4

64% of dependencies are not immediately visible in component code.

2. Failure Propagation Distance

Average hops from root cause to symptom: 4.2 layers

Maximum observed distance: 7 layers (Power → Application)

3. Documentation Coverage

Chain	Total Hops	Documented Hops	Coverage
Application → Power	13	9	69%
Configuration → Init	12	8	67%
Error Propagation	8	3	38%
Build System	7	7	100%

Average Documentation Coverage: 68% of transitive dependencies

Critical Gap: Error propagation chain is only 38% documented

Recommendations

1. Dependency Mapping Tools

Automated tools should:

Trace dependency chains to arbitrary depth
Flag undocumented transitive links
Estimate failure propagation distance
Calculate documentation coverage percentage

2. Design Guidelines

For new components:

Document transitive dependencies in comments
Add runtime checks at layer boundaries
Implement health monitoring for deep chains
Provide troubleshooting guides that follow chains backward

3. Integration Testing

Test suites should:

Verify complete chains end-to-end
Test failure injection at each layer
Validate error propagation paths
Measure time-to-detection for each failure mode

Analysis Method: Manual chain tracing, layer-by-layer analysis Longest Chain Found: 13 hops (Application → Board Configuration) Documentation Gap: 14 undocumented transitive links Date: December 20, 2024

Transitive Dependency Chains

What Are Transitive Dependencies?

Chain 1: Application → I2C Communication → Power

What You’re Looking At

Complete Dependency Path

Documented vs. Undocumented Links

Impact Analysis

Chain 2: Configuration → Topology → Bus → Power

What You’re Looking At

Initialization Dependency Chain

Documented vs. Undocumented Steps

Failure Modes

Chain 3: Error Propagation Path

What You’re Looking At

When I2C Read Fails

Transitive Error Impact

Chain 4: Build System Dependencies

What You’re Looking At

Compilation Dependency Chain

Key Insights from Transitive Analysis

1. Hidden Coupling

2. Failure Propagation Distance

3. Documentation Coverage

Recommendations

1. Dependency Mapping Tools

2. Design Guidelines

3. Integration Testing

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